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Celeron 800 MHz ES
Week 41, Year 2000RB80526RY800128 / V041582Q-3295 QAM8ES
An early engineering sample of the Celeron 800, one of the first Celeron with a 100 MHz front side bus before they switched from 66 MHz FSB. Based on a 0.18 µm coppermine core, this CPU includes 128 KB of L2 cache and the SSE instructions. It was built in september while intel announced the Celeron 800 on January, 3th 2001
